Video format conversion chip design

This paper introduces the design of an IC, which is capable of cross-converting between various DTV(digital television) standards, up to the HDTV (high definition television) resolution. A multi-phase FIR-based filtering algorithm is developed to perform the video scaling task. A dedicated fast SDRAM interface is designed, providing an economical high-density storage for frame buffer. Film material pre-processing and frame/field rate up-conversion are implemented in the memory control block. All the programmable parameters, such as the filter properties, can be set dynamically at run-time through an I2C interface, making the IC a very flexible system. This design has been verified through an FPGA emulation system.