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Variable length pattern matching for hardware network intrusion detection system

科研成果: 期刊稿件文章同行评审

摘要

With the wide adoption of internet into our everyday lives, internet security becomes an important issue. Intrusion detection at the network level is an effective way of stopping malicious attacks at the source and preventing viruses and worms from wide spreading. The key component in a successful network intrusion detection system is a high performance pattern matching engine that can uncover the malicious activities in real time. In this paper, we propose a highly parallel, scalable hardware based network intrusion detection system, that can handle variable pattern length efficiently and effectively. Pattern matching for a packet is completed in O(N log M) time where N is the size of the packet and M is the longest pattern length. Implementation is done on a standard off-the-shelf field-programmable gate array. Comparison with the other techniques shows promising results.

源语言英语
页(从-至)85-93
页数9
期刊Journal of Signal Processing Systems
59
1
DOI
出版状态已出版 - 4月 2010
已对外发布

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