TY - GEN
T1 - Understanding and Optimizing Hybrid SSD with High-Density and Low-Cost Flash Memory
AU - Shi, Liang
AU - Luo, Longfei
AU - Lv, Yina
AU - Li, Shicheng
AU - Li, Changlong
AU - Hsing-Mean Sha, Edwin
N1 - Publisher Copyright:
© 2021 IEEE.
PY - 2021
Y1 - 2021
N2 - With the development of NAND flash technology, hybrid SSDs with high-density and low-cost flash memory have become the mainstream of the existing SSD architecture. In this architecture, two flash modes can be dynamically switched, such as single-level cell (SLC) mode and quad-level cell (QLC) mode. Based on evaluations and analysis of multiple real devices, this paper presents two interesting findings. They demonstrate that the coordination between the two flash-modes is not well-designed in existing architectures. This paper proposes HyFlex, which redesigns the strategies of data placement and flash-mode management of hybrid SSDs in a flexible approach. Specifically, two novel optimization strategies are proposed: velocity-based I/O scheduling (VIS) and garbage collection (GC)-aware capacity tuning (GCT). Experimental results show that HyFlex achieves encouraging performance and endurance improvement.
AB - With the development of NAND flash technology, hybrid SSDs with high-density and low-cost flash memory have become the mainstream of the existing SSD architecture. In this architecture, two flash modes can be dynamically switched, such as single-level cell (SLC) mode and quad-level cell (QLC) mode. Based on evaluations and analysis of multiple real devices, this paper presents two interesting findings. They demonstrate that the coordination between the two flash-modes is not well-designed in existing architectures. This paper proposes HyFlex, which redesigns the strategies of data placement and flash-mode management of hybrid SSDs in a flexible approach. Specifically, two novel optimization strategies are proposed: velocity-based I/O scheduling (VIS) and garbage collection (GC)-aware capacity tuning (GCT). Experimental results show that HyFlex achieves encouraging performance and endurance improvement.
UR - https://www.scopus.com/pages/publications/85123937264
U2 - 10.1109/ICCD53106.2021.00046
DO - 10.1109/ICCD53106.2021.00046
M3 - 会议稿件
AN - SCOPUS:85123937264
T3 - Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
SP - 236
EP - 243
BT - Proceedings - 2021 IEEE 39th International Conference on Computer Design, ICCD 2021
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 39th IEEE International Conference on Computer Design, ICCD 2021
Y2 - 24 October 2021 through 27 October 2021
ER -