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The insight and evaluation of ultra-scaled sub-1 nm gate length transistors

  • He Tian*
  • , Yang Shen
  • , Zhaoyi Yan
  • , Yanming Liu
  • , Fan Wu
  • , Tian Ling Ren
  • *此作品的通讯作者
  • Tsinghua University

科研成果: 期刊稿件文章同行评审

摘要

There is a great attention of scaling down transistor based on 2D materials. Although gate-all-around (GAA) structure based on silicon has been simulated, the GAA structure combined with 2D materials do not have a well understanding. Moreover, the recent proposed edge graphene gated transistor also needs deeper analysis. Here, edge graphene gated 2D-FETs are further investigated and optimized by employing semi-classical numerical method. The physical dimensions can be optimized to obtain performance improvement, and some possible schemes are proposed. We demonstrate fair quantitative comparison for our proposed 0.34 nm graphene edge gated MoS2 and GAA graphene gated silicon nanowire device structure. It is found that the edge graphene gated MoS2 FET can achieve superior short channel performance compared to GAA graphene gated silicon nanowire and traditional GAA silicon nanowire FET, due to the generic nature of 2D TMDs, which possess direct narrow bandgap, low dielectric constant and atomic thickness. We have figured out that the 0.34 nm edge graphene gated MoS2 FET has even better subthreshold swing than the Si-GAA and Graphene-GAA, which shows promising prospect as next generation electronics.

源语言英语
文章编号111963
期刊Microelectronic Engineering
273
DOI
出版状态已出版 - 15 3月 2023
已对外发布

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