@inproceedings{e6056e1490da4fc5a886273d309ad09d,
title = "SEDG: Stitch-Compatible End-to-End Layout Decomposition Based on Graph Neural Network",
abstract = "Advanced semiconductor lithography faces significant challenges as feature sizes continue to shrink, necessitating effective Multiple Patterning Layout Decomposition (MPLD) algorithms. Existing MPLD algorithms are inefficient or cannot support stitch insertion to achieve finer-grained optimal decom-position. This paper introduces an end-to-end GNN-based frame-work that not only achieves high-quality solutions quickly but also applies to layouts with stitches. Our framework treats layouts as heterogeneous graphs and performs inference through a message-passing mechanism. We deliver ultra-competitive, near-optimal solutions that are 10x faster than the exact algorithm (e.g., integer linear programming) and 3x faster than approximate algorithms (e.g., exact-cover, semi-definite programming).",
keywords = "Layout decomposition, graph coloring, graph neural networks, message passing",
author = "Yifan Guo and Jiawei Chen and Yexin Li and Yunxiang Zhang and Qing Zhang and Yuhang Zhang and Yongfu Li",
note = "Publisher Copyright: {\textcopyright} 2025 EDAA.; 2025 Design, Automation and Test in Europe Conference, DATE 2025 ; Conference date: 31-03-2025 Through 02-04-2025",
year = "2025",
doi = "10.23919/DATE64628.2025.10992777",
language = "英语",
series = "Proceedings -Design, Automation and Test in Europe, DATE",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "2025 Design, Automation and Test in Europe Conference, DATE 2025 - Proceedings",
address = "美国",
}