TY - JOUR
T1 - Safety Verification of IEC 61131-3 Structured Text Programs
AU - Xiong, Jiawen
AU - Bu, Xiangxing
AU - Huang, Yanhong
AU - Shi, Jianqi
AU - He, Weigang
N1 - Publisher Copyright:
© 2005-2012 IEEE.
PY - 2021/4
Y1 - 2021/4
N2 - With the development of the industrial control system, programmable logic controllers (PLCs) are increasingly adopted in the process automation. Moreover, many PLCs play key roles in safety-critical systems, such as nuclear power plants, where robust and reliable control programs are required. To ensure the quality of programs, testing and verification methods are necessary. In this article, we present a novel methodology which applies model checking to verifying PLC programs. Specifically, we focus on the structured text (ST) language which is a widely used, high-level programming language defined in the electro-technical commission (IEC) 61131-3 standard. A formal model named behavior model (BM) is defined to specify the behavior of ST programs. An algorithm based on variable state analysis for automatically extracting the BM from an ST program is given. An algorithm based on the automata-theoretic approach is proposed to verify linear temporal logic properties on the BM. Finally, a real-life case study is presented.
AB - With the development of the industrial control system, programmable logic controllers (PLCs) are increasingly adopted in the process automation. Moreover, many PLCs play key roles in safety-critical systems, such as nuclear power plants, where robust and reliable control programs are required. To ensure the quality of programs, testing and verification methods are necessary. In this article, we present a novel methodology which applies model checking to verifying PLC programs. Specifically, we focus on the structured text (ST) language which is a widely used, high-level programming language defined in the electro-technical commission (IEC) 61131-3 standard. A formal model named behavior model (BM) is defined to specify the behavior of ST programs. An algorithm based on variable state analysis for automatically extracting the BM from an ST program is given. An algorithm based on the automata-theoretic approach is proposed to verify linear temporal logic properties on the BM. Finally, a real-life case study is presented.
KW - Formal verification
KW - electro-technical commission (IEC) 61131-3 standard
KW - model checking
KW - structured text (ST)
KW - weighted pushdown system (WPDS)
UR - https://www.scopus.com/pages/publications/85099508474
U2 - 10.1109/TII.2020.2999716
DO - 10.1109/TII.2020.2999716
M3 - 文章
AN - SCOPUS:85099508474
SN - 1551-3203
VL - 17
SP - 2632
EP - 2640
JO - IEEE Transactions on Industrial Informatics
JF - IEEE Transactions on Industrial Informatics
IS - 4
M1 - 9107345
ER -