Retiming and clock skew for synchronous systems

Liang Fang Chao; Edwin Hsing Mean Sha

Retiming and clock skew for synchronous systems

Liang Fang Chao^*
, Edwin Hsing Mean Sha

^*此作品的通讯作者

Iowa State University

科研成果: 期刊稿件 › 会议文章 › 同行评审

16 引用（Scopus）

摘要

Retiming and clock skew both are timing optimization methods for synchronous circuitry, but are usually applied separately. We use the concept of scheduling to form a common background in the formulation of retiming and clock skew, and to study the interplay between retiming and clock skew. A methodology to optimize synchronous circuitry with both retiming and clock skew is proposed.

源语言	英语
页（从-至）	283-286
页数	4
期刊	Proceedings - IEEE International Symposium on Circuits and Systems
卷	1
出版状态	已出版 - 1994
已对外发布	是
活动	Proceedings of the 1994 IEEE International Symposium on Circuits and Systems. Part 3 (of 6) - London, England 期限: 30 5月 1994 → 2 6月 1994

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title = "Retiming and clock skew for synchronous systems",

abstract = "Retiming and clock skew both are timing optimization methods for synchronous circuitry, but are usually applied separately. We use the concept of scheduling to form a common background in the formulation of retiming and clock skew, and to study the interplay between retiming and clock skew. A methodology to optimize synchronous circuitry with both retiming and clock skew is proposed.",

author = "Chao, \{Liang Fang\} and Sha, \{Edwin Hsing Mean\}",

year = "1994",

language = "英语",

volume = "1",

pages = "283--286",

journal = "Proceedings - IEEE International Symposium on Circuits and Systems",

issn = "0271-4310",

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note = "Proceedings of the 1994 IEEE International Symposium on Circuits and Systems. Part 3 (of 6) ; Conference date: 30-05-1994 Through 02-06-1994",

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T1 - Retiming and clock skew for synchronous systems

AU - Chao, Liang Fang

AU - Sha, Edwin Hsing Mean

PY - 1994

Y1 - 1994

N2 - Retiming and clock skew both are timing optimization methods for synchronous circuitry, but are usually applied separately. We use the concept of scheduling to form a common background in the formulation of retiming and clock skew, and to study the interplay between retiming and clock skew. A methodology to optimize synchronous circuitry with both retiming and clock skew is proposed.

AB - Retiming and clock skew both are timing optimization methods for synchronous circuitry, but are usually applied separately. We use the concept of scheduling to form a common background in the formulation of retiming and clock skew, and to study the interplay between retiming and clock skew. A methodology to optimize synchronous circuitry with both retiming and clock skew is proposed.

UR - https://www.scopus.com/pages/publications/0028582437

M3 - 会议文章

AN - SCOPUS:0028582437

SN - 0271-4310

VL - 1

SP - 283

EP - 286

JO - Proceedings - IEEE International Symposium on Circuits and Systems

JF - Proceedings - IEEE International Symposium on Circuits and Systems

T2 - Proceedings of the 1994 IEEE International Symposium on Circuits and Systems. Part 3 (of 6)

Y2 - 30 May 1994 through 2 June 1994

ER -

Retiming and clock skew for synchronous systems

摘要

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