@inproceedings{474a7df7ce944d83aeec5d0ec66457e9,
title = "Research on computing IP core for the digital signature algorithm",
abstract = "Polynomial multiplication with big integer coefficients over finite field is frequently used in some digital signature algorithms, in which this kind of calculation is the most time consuming part realized by software. This paper presents a new method (FFT/IFFT) and try to solve it using FPGA. With the reduced calculation amount compared with normal algorithm and realized in hardware, it will greatly raise not only the performance of this calculation procedure but also the level of security. At the end of this paper, some intermediate results are given.",
author = "Jianpeng Chu and Yongsheng Xu and Xiaojin Li and Zongsheng Lai",
note = "Publisher Copyright: {\textcopyright} 2003 IEEE; 5th International Conference on ASIC, ASICON 2003 ; Conference date: 21-10-2003 Through 24-10-2003",
year = "2003",
doi = "10.1109/ICASIC.2003.1277462",
language = "英语",
series = "IEEE International Symposium on Semiconductor Manufacturing Conference Proceedings",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "1329--1331",
editor = "Ting-Ao Tang and Wenhong Li and Huihua Yu",
booktitle = "ASICON 2003 - 2003 5th International Conference on ASIC, Proceedings",
address = "美国",
}