TY - GEN
T1 - Optimizing data scheduling on processor-in-memory arrays
AU - Tian, Y.
AU - Sha, E. H.M.
AU - Chantrapornchai, C.
AU - Kogge, P. M.
N1 - Publisher Copyright:
© 1998 IEEE.
PY - 1998
Y1 - 1998
N2 - In the study of PetaFlop project, Processor-in-Memory array was proposed to be a target architecture in achieving 1015 floating point operations per second computing performance. However one of the major obstacles to achieve the fast computing was interprocessor communications, which lengthen the total execution time of an application. A good data scheduling, consisting of finding initial data placement and data movement during the run-time, can give a significant reduction in the total communication cost and the execution time of the application. In this paper, we propose efficient algorithms for the data scheduling problem. Experimental results show the effectiveness of the proposed approaches. Compared with default data distribution methods such as row-wise or column-wise distributions, the average improvement for the tested benchmarks can be up to 30%.
AB - In the study of PetaFlop project, Processor-in-Memory array was proposed to be a target architecture in achieving 1015 floating point operations per second computing performance. However one of the major obstacles to achieve the fast computing was interprocessor communications, which lengthen the total execution time of an application. A good data scheduling, consisting of finding initial data placement and data movement during the run-time, can give a significant reduction in the total communication cost and the execution time of the application. In this paper, we propose efficient algorithms for the data scheduling problem. Experimental results show the effectiveness of the proposed approaches. Compared with default data distribution methods such as row-wise or column-wise distributions, the average improvement for the tested benchmarks can be up to 30%.
UR - https://www.scopus.com/pages/publications/0031673729
U2 - 10.1109/IPPS.1998.669890
DO - 10.1109/IPPS.1998.669890
M3 - 会议稿件
AN - SCOPUS:0031673729
T3 - Proceedings of the 1st Merged International Parallel Processing Symposium and Symposium on Parallel and Distributed Processing, IPPS/SPDP 1998
SP - 57
EP - 61
BT - Proceedings of the 1st Merged International Parallel Processing Symposium and Symposium on Parallel and Distributed Processing, IPPS/SPDP 1998
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 1st Merged International Parallel Processing Symposium and Symposium on Parallel and Distributed Processing, IPPS/SPDP 1998
Y2 - 30 March 1998 through 3 April 1998
ER -