Optimal partitioning and balanced scheduling with the maximal overlap of data footprints

Z. Wang; E. H.M. Sha; Y. Wang

doi:10.1145/368122.368155

Optimal partitioning and balanced scheduling with the maximal overlap of data footprints

Z. Wang^*
, E. H.M. Sha
, Y. Wang

^*此作品的通讯作者

University of Notre Dame

科研成果: 期刊稿件 › 会议文章 › 同行评审

1 引用（Scopus）

摘要

The paper proposes a scheme to tolerate the slow memory access latency for loop intensive applications in the system with memory hierarchy. The scheme takes into consideration of both the intermediate data and maximal overlap of data footprints for initial data. Furthermore, a schedule is presented to balance the ALU computation and memory operations. The memory requirement under such schedule is calculated. This schedule's improvement in total execution time is approximately 20% over existing methods.

源语言	英语
页（从-至）	31-36
页数	6
期刊	Proceedings of the IEEE Great Lakes Symposium on VLSI
DOI	https://doi.org/10.1145/368122.368155
出版状态	已出版 - 2001
已对外发布	是
活动	11th Great Lakes Sysmposium on VLSI (GLSVLSI 2001) - West Lafayette, IN, 美国期限: 22 3月 2001 → 23 3月 2001

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10.1145/368122.368155

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@article{b0166e2d53cf4442bfe18f59e885ab9e,

title = "Optimal partitioning and balanced scheduling with the maximal overlap of data footprints",

abstract = "The paper proposes a scheme to tolerate the slow memory access latency for loop intensive applications in the system with memory hierarchy. The scheme takes into consideration of both the intermediate data and maximal overlap of data footprints for initial data. Furthermore, a schedule is presented to balance the ALU computation and memory operations. The memory requirement under such schedule is calculated. This schedule's improvement in total execution time is approximately 20\% over existing methods.",

author = "Z. Wang and Sha, \{E. H.M.\} and Y. Wang",

year = "2001",

doi = "10.1145/368122.368155",

language = "英语",

pages = "31--36",

journal = "Proceedings of the IEEE Great Lakes Symposium on VLSI",

issn = "1066-1395",

publisher = "IEEE Computer Society",

note = "11th Great Lakes Sysmposium on VLSI (GLSVLSI 2001) ; Conference date: 22-03-2001 Through 23-03-2001",

}

TY - JOUR

T1 - Optimal partitioning and balanced scheduling with the maximal overlap of data footprints

AU - Wang, Z.

AU - Sha, E. H.M.

AU - Wang, Y.

PY - 2001

Y1 - 2001

N2 - The paper proposes a scheme to tolerate the slow memory access latency for loop intensive applications in the system with memory hierarchy. The scheme takes into consideration of both the intermediate data and maximal overlap of data footprints for initial data. Furthermore, a schedule is presented to balance the ALU computation and memory operations. The memory requirement under such schedule is calculated. This schedule's improvement in total execution time is approximately 20% over existing methods.

AB - The paper proposes a scheme to tolerate the slow memory access latency for loop intensive applications in the system with memory hierarchy. The scheme takes into consideration of both the intermediate data and maximal overlap of data footprints for initial data. Furthermore, a schedule is presented to balance the ALU computation and memory operations. The memory requirement under such schedule is calculated. This schedule's improvement in total execution time is approximately 20% over existing methods.

UR - https://www.scopus.com/pages/publications/0034998512

U2 - 10.1145/368122.368155

DO - 10.1145/368122.368155

M3 - 会议文章

AN - SCOPUS:0034998512

SN - 1066-1395

SP - 31

EP - 36

JO - Proceedings of the IEEE Great Lakes Symposium on VLSI

JF - Proceedings of the IEEE Great Lakes Symposium on VLSI

T2 - 11th Great Lakes Sysmposium on VLSI (GLSVLSI 2001)

Y2 - 22 March 2001 through 23 March 2001

ER -

Optimal partitioning and balanced scheduling with the maximal overlap of data footprints

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