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Minimizing memory access schedule for memories

  • Jingtong Hu*
  • , Chun Jason Xue
  • , Wei Che Tseng
  • , Meikang Qiu
  • , Yingchao Zhao
  • , Edwin H.M. Sha
  • *此作品的通讯作者
  • University of Texas at Dallas
  • City University of Hong Kong
  • University of Kentucky

科研成果: 书/报告/会议事项章节会议稿件同行评审

摘要

According to the characteristics of the "3-D" structure of contemporary DRAM chips, the Row First Column Ordered (RFCO) algorithm is proposed in this paper to minimize memory access schedule length. In memory systems with a single memory controller, assuming that the memory access trace is known before scheduling, the RFCO algorithm can generate schedules which are 7.89% shorter than burst scheduling [12] on average. If memory accesses are coming to the single memory controller in real time, the RFCO algorithm can generate schedules which are 8.03% shorter than burst scheduling on average.

源语言英语
主期刊名ICPADS '09 - 15th International Conference on Parallel and Distributed Systems
104-111
页数8
DOI
出版状态已出版 - 2009
已对外发布
活动15th International Conference on Parallel and Distributed Systems, ICPADS '09 - Shenzhen, Guangdong, 中国
期限: 8 12月 200911 12月 2009

出版系列

姓名Proceedings of the International Conference on Parallel and Distributed Systems - ICPADS
ISSN(印刷版)1521-9097

会议

会议15th International Conference on Parallel and Distributed Systems, ICPADS '09
国家/地区中国
Shenzhen, Guangdong
时期8/12/0911/12/09

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