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Exploiting process variation for read performance improvement on LDPC based flash memory storage systems

  • Chongqing University
  • City University of Hong Kong

科研成果: 书/报告/会议事项章节会议稿件同行评审

摘要

With the development of bit density and technology scaling, the process variation (PV) has become much severe on NAND flash memory. As PV presents reliability among flash blocks, which causes read performance variation to read data on different blocks. This paper proposes to improve read performance of LDPC based flash memory by exploiting the reliability characteristics of PV. First, a block grouping approach is proposed to classify the flash blocks based on their reliability. Then, a read data placement scheme is proposed, which is designed to place read-hot data on flash blocks with high reliability and move read-cold data to blocks with low reliability. Experiment results show that, with negligible overhead, the proposed scheme is able to significantly improve the read performance.

源语言英语
主期刊名Proceedings - 35th IEEE International Conference on Computer Design, ICCD 2017
出版商Institute of Electrical and Electronics Engineers Inc.
681-684
页数4
ISBN(电子版)9781538622544
DOI
出版状态已出版 - 22 11月 2017
已对外发布
活动35th IEEE International Conference on Computer Design, ICCD 2017 - Boston, 美国
期限: 5 11月 20178 11月 2017

出版系列

姓名Proceedings - 35th IEEE International Conference on Computer Design, ICCD 2017

会议

会议35th IEEE International Conference on Computer Design, ICCD 2017
国家/地区美国
Boston
时期5/11/178/11/17

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