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Explicit construction for reliable reconfigurable array architectures

  • Princeton University

科研成果: 书/报告/会议事项章节会议稿件同行评审

摘要

This paper describes some explicit constructions for reconfigurable array architectures. Given a working architecture (application graph), the authors add redundant hardware to increase reliability. The degree of reconfigurability, DR, of a redundant graph is a measure of the cost of reconfiguration after failures. When DR is independent of the size of the application graph, the authors say the graph is finitely reconfigurable, FR. They present a class of simple layered graphs with a logarithmic number of redundant edges, which can maintain both finite reconfigurability and a fixed level of reliability for a wide class of application graphs. By sacrificing finite reconfigurability, they show that by using expanders they can construct highly reliable structures with the asymptotically optimal number of edges for one-dimensional and tree-like array architectures.

源语言英语
主期刊名Proceedings of the 3rd IEEE Symposium on Parallel and Distributed Processing 1991
出版商Institute of Electrical and Electronics Engineers Inc.
640-647
页数8
ISBN(电子版)0818623101, 9780818623103
DOI
出版状态已出版 - 1991
已对外发布
活动3rd IEEE Symposium on Parallel and Distributed Processing, PDPS 1991 - Dallas, 美国
期限: 2 12月 19915 12月 1991

出版系列

姓名Proceedings of the 3rd IEEE Symposium on Parallel and Distributed Processing 1991

会议

会议3rd IEEE Symposium on Parallel and Distributed Processing, PDPS 1991
国家/地区美国
Dallas
时期2/12/915/12/91

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