Direct extraction method for stripline packaged field effect transistor small signal equivalent circuit model

A new method for the extraction of the small signal model parameters for packaged field effect transistors (FETs) is proposed in this article. This method differs from previous ones by extracting the packaging model parameters under active bias conditions without global numerical optimization techniques. The main advantage of this method is that a unique and physically meaningful set of extrinsic packaging model parameters are extracted by using a set of closed form expressions based on the coaxial measurement for packaged device and on-wafer measurement for chip. Good agreement is obtained between simulated and measured results for a gallium arsenide MESFET with 0.5 μm gatelength and 400 μm gatewidth over a wide range of bias points up to 8 GHz.