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Design of high-throughput mixed-radix MDF FFT processor for IEEE 802.11.3c

  • Jun Feng Tang*
  • , Xiao Jin Li
  • , Gang Zhang
  • , Zong Sheng Lai
  • *此作品的通讯作者
  • East China Normal University

科研成果: 书/报告/会议事项章节会议稿件同行评审

摘要

In this paper, a 512-point, 2.7 GS/s fast Fourier transform (FFT) processor embedded with mixed-radix multi-path delay-feedback (MRMDF) structure is proposed. To meet the high throughput requirement of IEEE 802.15.3c (WPANs), the architecture of eight parallel data-paths is adopted. Considering the hardware complexity and high performance, 512 point FFT computation is decomposed into radix-25 and radix-23 so that the number of the multiplications is reduced by 30% comparing with the traditional method. Furthermore, the complex multipliers are also optimized and replaced by a set of constant multipliers. The proposed FFT processor has been implemented using FPGA, and the result shows that the throughput rate (T.R.) up to 2.7GS/s@338MHz can be achieved.

源语言英语
主期刊名ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings
DOI
出版状态已出版 - 2012
活动2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2012 - Xi'an, 中国
期限: 29 10月 20121 11月 2012

出版系列

姓名ICSICT 2012 - 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Proceedings

会议

会议2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2012
国家/地区中国
Xi'an
时期29/10/121/11/12

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