摘要
This paper presents the derivation of an operational semantics from a denotational semantics for a subset of the widely used hardware description language Verilog. Our aim is to build equivalence between the operational and denotational semantics. We propose a discrete denotational semantic model for Verilog. A phase semantics is provided for each type of transition in order to derive the operational semantics.
| 源语言 | 英语 |
|---|---|
| 页 | 177-184 |
| 页数 | 8 |
| 出版状态 | 已出版 - 2001 |
| 已对外发布 | 是 |
| 活动 | 8th Asia Pacific Software Engineering Conference APSEC'2001 - Macao, 中国 期限: 4 12月 2001 → 7 12月 2001 |
会议
| 会议 | 8th Asia Pacific Software Engineering Conference APSEC'2001 |
|---|---|
| 国家/地区 | 中国 |
| 市 | Macao |
| 时期 | 4/12/01 → 7/12/01 |
学术指纹
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