摘要
ARM's big. LITTLE architecture coupled with Heterogeneous Multi-Processing (HMP) has enabled energy-efficient solutions in the dark silicon era. System-level techniques activate nonadjacent cores to eliminate chip thermal hotspot. However, it unexpectedly increases communication delay due to longer distance in network architectures, and in turn degrades application performance and system energy efficiency. In this paper, we present a novel hierarchical hardware-software collaborated approach to address the performance/temperature conflict in dark silicon many-core systems. Optimizations on interprocessor communication, application performance, chip temperature and energy consumption are well isolated and addressed in different phases. Evaluation results show that on average 22.57% reduction of communication latency, 23.04% improvement on energy efficiency and 6.11°C reduction of chip peak temperature are achieved compared with state-of-the-art techniques.
| 源语言 | 英语 |
|---|---|
| 主期刊名 | 2017 22nd Asia and South Pacific Design Automation Conference, ASP-DAC 2017 |
| 出版商 | Institute of Electrical and Electronics Engineers Inc. |
| 页 | 494-499 |
| 页数 | 6 |
| ISBN(电子版) | 9781509015580 |
| DOI | |
| 出版状态 | 已出版 - 16 2月 2017 |
| 已对外发布 | 是 |
| 活动 | 22nd Asia and South Pacific Design Automation Conference, ASP-DAC 2017 - Chiba, 日本 期限: 16 1月 2017 → 19 1月 2017 |
出版系列
| 姓名 | Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC |
|---|
会议
| 会议 | 22nd Asia and South Pacific Design Automation Conference, ASP-DAC 2017 |
|---|---|
| 国家/地区 | 日本 |
| 市 | Chiba |
| 时期 | 16/01/17 → 19/01/17 |
联合国可持续发展目标
此成果有助于实现下列可持续发展目标:
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可持续发展目标 7 经济适用的清洁能源
学术指纹
探究 'Dark silicon-aware hardware-software collaborated design for heterogeneous many-core systems' 的科研主题。它们共同构成独一无二的学术指纹。引用此
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