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Clock skew analysis based on NBTI degeneration of pMOSFET

科研成果: 书/报告/会议事项章节会议稿件同行评审

摘要

In this paper, a set of formulas which are sensitive to the shift in threshold voltage (AVth) of PMOS transistor, load capacitance (CL), and input transition (ti) have been explored to calculate the propagation delay of CMOS inverter using curved surfaces fitting. Different from conventional of focusing on load capacitance and input transition, our proposed model pay more attention to the impact of AVth variation caused by NBTI degeneration on the propagation delay. Moreover, this paper has also proposed a framework to calculate the path delay and clock skew of clock tree network based on the proposed delay model. In order to validate our proposed models and methods, the SPICE-level simulation of the benchmark circuit (s38417) has been compared with our model calculation using a 45-nm CMOS process technology, the results show that our models and methods can calculate the extra path delay and clock skew caused by the shift in threshold voltage.

源语言英语
主期刊名Proceedings of 2016 IEEE International Conference on Integrated Circuits and Microsystems, ICICM 2016
出版商Institute of Electrical and Electronics Engineers Inc.
319-323
页数5
ISBN(电子版)9781509028146
DOI
出版状态已出版 - 10 1月 2017
活动2016 IEEE International Conference on Integrated Circuits and Microsystems, ICICM 2016 - Chengdu, 中国
期限: 23 11月 201625 11月 2016

出版系列

姓名Proceedings of 2016 IEEE International Conference on Integrated Circuits and Microsystems, ICICM 2016

会议

会议2016 IEEE International Conference on Integrated Circuits and Microsystems, ICICM 2016
国家/地区中国
Chengdu
时期23/11/1625/11/16

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