摘要
In this article, a simple method for the small-signal equivalent-circuit modelling of SiGe heterojunction bipolar transistors (HBTs) fabricated with a 0.13-m BiCMOS technology is proposed. The presented transistor model is compatible with BiCMOS processes and takes into account the parasitic effects such as substrate effect and the extrinsic capacitances. The parameter-extraction approach is based on the analytically derived equations in conjunction with the optimisation technology. The intrinsic parameters are described as the function of extrinsic resistances. The extrinsic resistances are iteratively extracted by the variance of the intrinsic elements as an optimisation criterion. The proposed modelling approach is validated by SiGe HBTs with 0.2 × 5.9 m2 emitter occupying area from 50 MHz to 40 GHz. The agreements between the measured and modelled data are excellent in the desired frequency range over a wide range of bias points with different bias conditions.
| 源语言 | 英语 |
|---|---|
| 页(从-至) | 10-23 |
| 页数 | 14 |
| 期刊 | International Journal of Electronics |
| 卷 | 101 |
| 期 | 1 |
| DOI | |
| 出版状态 | 已出版 - 2 1月 2014 |
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