TY - JOUR
T1 - All-Ferroelectric Memtransistors for Brain-Inspired Computing
AU - Zeng, Jinhua
AU - Ye, Chenyu
AU - Wu, Guangjian
AU - Wang, Huiting
AU - Zhao, Qianru
AU - Wu, Shuaiqin
AU - Wang, Xudong
AU - Lin, Tie
AU - Ge, Jun
AU - Shen, Hong
AU - Chu, Junhao
AU - Wang, Jianlu
N1 - Publisher Copyright:
© 2026 Wiley-VCH GmbH.
PY - 2026/4/27
Y1 - 2026/4/27
N2 - In-memory computing is pursued to overcome the memory and power walls inherent to the von Neumann architecture. However, heterosynaptic memtransistors with higher modulation dimensionality and enhanced memory capability still suffer from a limited conductance dynamic range and few gate-controlled states, constraining learning precision. Here, an all-ferroelectric memtransistor is demonstrated that synergistically combines a P(VDF-TrFE) ferroelectric gate dielectric with an α-In2Se3 ferroelectric semiconductor channel. As the third-terminal modulator, the P(VDF-TrFE) gate sets the channel Fermi level via out-of-plane polarization reversal, while the channel's in-plane polarization at the pre- and post-synaptic drain and source asymmetrically tunes the contact Schottky barriers. The coupling of these two distinct ferroelectric effects generates four well-separated nonvolatile conductance states in fully polarized configurations, introduces 12 third-terminal states via ferroelectric-gate domain control, and enables 100 intermediate states in the ferroelectric channel through source–drain pulses. The device emulates heterosynaptic regulation, enabling global enhancement or suppression of synaptic features. Compared with conventional designs, it offers a dynamic range of up to 331.91 and 12 gate-controlled states. An adaptive neural network implemented with measured device characteristics achieves 95.68% pattern recognition accuracy, with gate pulses selecting optimal operational regimes. This work provides an effective device platform for high-performance brain-inspired computing.
AB - In-memory computing is pursued to overcome the memory and power walls inherent to the von Neumann architecture. However, heterosynaptic memtransistors with higher modulation dimensionality and enhanced memory capability still suffer from a limited conductance dynamic range and few gate-controlled states, constraining learning precision. Here, an all-ferroelectric memtransistor is demonstrated that synergistically combines a P(VDF-TrFE) ferroelectric gate dielectric with an α-In2Se3 ferroelectric semiconductor channel. As the third-terminal modulator, the P(VDF-TrFE) gate sets the channel Fermi level via out-of-plane polarization reversal, while the channel's in-plane polarization at the pre- and post-synaptic drain and source asymmetrically tunes the contact Schottky barriers. The coupling of these two distinct ferroelectric effects generates four well-separated nonvolatile conductance states in fully polarized configurations, introduces 12 third-terminal states via ferroelectric-gate domain control, and enables 100 intermediate states in the ferroelectric channel through source–drain pulses. The device emulates heterosynaptic regulation, enabling global enhancement or suppression of synaptic features. Compared with conventional designs, it offers a dynamic range of up to 331.91 and 12 gate-controlled states. An adaptive neural network implemented with measured device characteristics achieves 95.68% pattern recognition accuracy, with gate pulses selecting optimal operational regimes. This work provides an effective device platform for high-performance brain-inspired computing.
KW - adaptivity
KW - all-ferroelectric memtransistors
KW - brain-inspired computing
KW - heterosynaptic plasticity
KW - in-plane and out-of-plane polarizations
UR - https://www.scopus.com/pages/publications/105029007684
U2 - 10.1002/adfm.202531393
DO - 10.1002/adfm.202531393
M3 - 文章
AN - SCOPUS:105029007684
SN - 1616-301X
VL - 36
JO - Advanced Functional Materials
JF - Advanced Functional Materials
IS - 34
M1 - e31393
ER -