摘要
Multi-dimensional systems containing nested loops are widely used to model scientific applications such as image processing, geophysical signal processing and fluid dynamics. However, branches within these loops may degrade the performance of pipelined architectures. This paper presents the theory, supporting hardware and experiments of a novel technique, based on multi-dimensional retiming, for reducing pipeline hazards caused by branches within nested loops. This technique, called Multi-Dimensional Branch Anticipation Scheduling, is able to achieve near-optimal schedule length for nested loops containing branch instructions.
| 源语言 | 英语 |
|---|---|
| 页(从-至) | 163-168 |
| 页数 | 6 |
| 期刊 | Proceedings of the IEEE Great Lakes Symposium on VLSI |
| 出版状态 | 已出版 - 1997 |
| 已对外发布 | 是 |
| 活动 | Proceedings of the 1997 7th Great Lakes Symposium on VLSI - Urbana-Champaign, IL, USA 期限: 13 3月 1997 → 15 3月 1997 |
指纹
探究 'Algorithm and hardware support for branch anticipation' 的科研主题。它们共同构成独一无二的指纹。引用此
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