摘要
A novel extrinsic resistance extraction method of MOSFET at Vgs = Vds = 0 V from S-parameter measurements is presented in this paper. Simulated and measured results of 90-nm gatelength MOSFET device with a 8 × 0.6 × 12 µm gatewidth (number of gate finger × unit gate width × cells) are compared, and good agreement has been obtained up to 50 GHz. Furthermore, comparisons between the proposed approach and other three methods published are also made in this paper.
| 源语言 | 英语 |
|---|---|
| 页(从-至) | 1044-1054 |
| 页数 | 11 |
| 期刊 | International Journal of Numerical Modelling: Electronic Networks, Devices and Fields |
| 卷 | 29 |
| 期 | 6 |
| DOI | |
| 出版状态 | 已出版 - 1 11月 2016 |
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