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A low-voltage low-power multi-channel neural interface IC using level-shifted feedback technology

  • Liangjian Lyu
  • , Yu Wang*
  • , Chixiao Chen
  • , C. J. Richard Shi
  • *此作品的通讯作者
  • Fudan University
  • University of Washington

科研成果: 书/报告/会议事项章节会议稿件同行评审

摘要

A low-voltage low-power 16-channel neural interface front-end IC for in-vivo neural recording applications is presented in this paper. A current reuse telescope amplifier is used to achieve better noise efficiency factor (NEF). Power efficiency factor (PEF) is further improved by reducing supply voltage with the proposed level-shifted feedback (LSFB) technique. The neural interface is fabricated in a 65 nm CMOS process. It operates under 0.6V supply voltage consuming 1.07 µW/channel. An input referred noise of 5.18 µV is measured, leading to a NEF of 2.94 and a PEF of 5.19 over 10 kHz bandwidth.

源语言英语
主期刊名ASP-DAC 2019 - 24th Asia and South Pacific Design Automation Conference
出版商Institute of Electrical and Electronics Engineers Inc.
13-14
页数2
ISBN(电子版)9781450360074
DOI
出版状态已出版 - 21 1月 2019
已对外发布
活动24th Asia and South Pacific Design Automation Conference, ASPDAC 2019 - Tokyo, 日本
期限: 21 1月 201924 1月 2019

出版系列

姓名Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

会议

会议24th Asia and South Pacific Design Automation Conference, ASPDAC 2019
国家/地区日本
Tokyo
时期21/01/1924/01/19

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