A Low-Power VCO based ADC with asynchronous sigma-delta modulator in 65nm CMOS

Jili Zhang; Chenluan Wang; Shengxi Diao; Fujiang Lin

doi:10.1109/ASPDAC.2015.7058975

A Low-Power VCO based ADC with asynchronous sigma-delta modulator in 65nm CMOS

Jili Zhang
, Chenluan Wang
, Shengxi Diao
, Fujiang Lin

University of Science and Technology of China

科研成果: 书/报告/会议事项章节 › 会议稿件 › 同行评审

2 引用（Scopus）

摘要

This paper presents a low power VCO based ADC with asynchronous sigma-delta modulator (ASDM). A prototype is designed in 65nm CMOS technology with a measured performance of 54.3dB SNDR and 68dB SFDR over 8MHz bandwidth while consuming 2.8mW from a 1.2V supply.

源语言	英语
主期刊名	20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015
出版商	Institute of Electrical and Electronics Engineers Inc.
页	38-39
页数	2
ISBN（电子版）	9781479977925
DOI	https://doi.org/10.1109/ASPDAC.2015.7058975
出版状态	已出版 - 11 3月 2015
已对外发布	是
活动	2015 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015 - Chiba, 日本期限: 19 1月 2015 → 22 1月 2015

出版系列

姓名	20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015

会议

会议	2015 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015
国家/地区	日本
市	Chiba
时期	19/01/15 → 22/01/15

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10.1109/ASPDAC.2015.7058975

其它文件与链接

链接到 Scopus 的出版物

引用此

Zhang, J., Wang, C., Diao, S., & Lin, F. (2015). A Low-Power VCO based ADC with asynchronous sigma-delta modulator in 65nm CMOS. 在 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015 (页码 38-39). 文章 7058975 (20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ASPDAC.2015.7058975

@inproceedings{d701238d7a364305abab95236247028c,

title = "A Low-Power VCO based ADC with asynchronous sigma-delta modulator in 65nm CMOS",

abstract = "This paper presents a low power VCO based ADC with asynchronous sigma-delta modulator (ASDM). A prototype is designed in 65nm CMOS technology with a measured performance of 54.3dB SNDR and 68dB SFDR over 8MHz bandwidth while consuming 2.8mW from a 1.2V supply.",

author = "Jili Zhang and Chenluan Wang and Shengxi Diao and Fujiang Lin",

note = "Publisher Copyright: {\textcopyright} 2015 IEEE.; 2015 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015 ; Conference date: 19-01-2015 Through 22-01-2015",

year = "2015",

month = mar,

day = "11",

doi = "10.1109/ASPDAC.2015.7058975",

language = "英语",

series = "20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "38--39",

booktitle = "20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015",

address = "美国",

}

Zhang, J, Wang, C, Diao, S & Lin, F 2015, A Low-Power VCO based ADC with asynchronous sigma-delta modulator in 65nm CMOS. 在 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015., 7058975, 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015, Institute of Electrical and Electronics Engineers Inc., 页码 38-39, 2015 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015, Chiba, 日本, 19/01/15. https://doi.org/10.1109/ASPDAC.2015.7058975

A Low-Power VCO based ADC with asynchronous sigma-delta modulator in 65nm CMOS. / Zhang, Jili; Wang, Chenluan; Diao, Shengxi 等.
20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015. Institute of Electrical and Electronics Engineers Inc., 2015. 页码 38-39 7058975 (20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015).

科研成果: 书/报告/会议事项章节 › 会议稿件 › 同行评审

TY - GEN

T1 - A Low-Power VCO based ADC with asynchronous sigma-delta modulator in 65nm CMOS

AU - Zhang, Jili

AU - Wang, Chenluan

AU - Diao, Shengxi

AU - Lin, Fujiang

PY - 2015/3/11

Y1 - 2015/3/11

N2 - This paper presents a low power VCO based ADC with asynchronous sigma-delta modulator (ASDM). A prototype is designed in 65nm CMOS technology with a measured performance of 54.3dB SNDR and 68dB SFDR over 8MHz bandwidth while consuming 2.8mW from a 1.2V supply.

AB - This paper presents a low power VCO based ADC with asynchronous sigma-delta modulator (ASDM). A prototype is designed in 65nm CMOS technology with a measured performance of 54.3dB SNDR and 68dB SFDR over 8MHz bandwidth while consuming 2.8mW from a 1.2V supply.

UR - https://www.scopus.com/pages/publications/84926466653

U2 - 10.1109/ASPDAC.2015.7058975

DO - 10.1109/ASPDAC.2015.7058975

M3 - 会议稿件

AN - SCOPUS:84926466653

T3 - 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015

SP - 38

EP - 39

BT - 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2015 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015

Y2 - 19 January 2015 through 22 January 2015

ER -

Zhang J, Wang C, Diao S, Lin F. A Low-Power VCO based ADC with asynchronous sigma-delta modulator in 65nm CMOS. 在 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015. Institute of Electrical and Electronics Engineers Inc. 2015. 页码 38-39. 7058975. (20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015). doi: 10.1109/ASPDAC.2015.7058975

A Low-Power VCO based ADC with asynchronous sigma-delta modulator in 65nm CMOS

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