@inproceedings{8ceef52fdee04c04a5d9972706adc410,
title = "A low-power 18-GHz dual-injection-locked frequency divider in 65-nm CMOS",
abstract = "In this paper, an 18-GHz dual-injection locked frequency divider (ILFD) is presented. In order to decrease the complexity of PLL design, the dual-ILFD doesn't adopt a frequency adjustment scheme but achieves a large locking range due to fully utilizing the voltage and current injection of the input signal. This ILFD is implemented in SMIC 65nm CMOS technology and consumes 1.8mW from a 1.2V voltage supply excluding buffers and biasing circuits. The core area is 0.35mmx 0.73mm. The measured locking range is 13.3GHz∼18.4GHz with 0dBm input power.",
keywords = "18GHz, dual-ILFD, large locking range, low power",
author = "Dong Huang and Shengxi Diao and Peng Wei and Fujiang Lin",
year = "2012",
doi = "10.1109/GSMM.2012.6314054",
language = "英语",
isbn = "9781467313032",
series = "Proceedings of 2012 5th Global Symposium on Millimeter-Waves, GSMM 2012",
pages = "278--281",
booktitle = "Proceedings of 2012 5th Global Symposium on Millimeter-Waves, GSMM 2012",
note = "2012 5th Global Symposium on Millimeter-Waves, GSMM 2012 ; Conference date: 27-05-2012 Through 30-05-2012",
}