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A Low Noise High Linearity RF Front End Circuits Design

  • East China Normal University

科研成果: 期刊稿件文章同行评审

摘要

One key design of UHF receiver IC, i.e. RF front end circuit, is described. From the aspects of noise matching, linearity, impedance matching and gain, the design methodology of the integrated low noise amplifier and downconversion mixer are presented in detail. The circuits have been fabricated with a 0.8 μm silicon BiCMOS process. The overall conversion gain of the front end is 18 dB, the double-sideband noise figure is 2.5 dB, the IIP3 is +5 dBm, and the circuit takes only 3.4 mA from a 5 V supply.

源语言英语
页(从-至)188-193
页数6
期刊Guti Dianzixue Yanjiu Yu Jinzhan/Research and Progress of Solid State Electronics
26
2
出版状态已出版 - 5月 2006

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