TY - JOUR
T1 - A high-linearity mmWave Doherty power amplifier for 5G FR2 wireless communications
AU - Xu, Wentao
AU - Cui, Bo
AU - Hu, Chenge
AU - Shi, Chunqi
AU - Huang, Leilei
AU - Zhang, Runxi
N1 - Publisher Copyright:
Copyright © 2025 The Institute of Electronics, Information and Communication Engineers.
PY - 2025
Y1 - 2025
N2 - This paper presents a high-linearity millimeter-wave (mmWave) Doherty power amplifier (PA) for 5G FR2 wireless communications. A precise mutual distortion cancellation (PMDC) method for parallel Doherty PA is proposed. The auxiliary path current amplitude is adjusted by the common-source common-gate (CSCG) dual adaptive bias circuit (DADB). Meanwhile, the main path current phase is tuned by the phase nonlinear compensation capacitor (PNCC). These two techniques are combined to enable precise distortion cancellation, thereby optimizing the Doherty PA’s AM-AM and AM-PM distortions. The chip is fabricated in a 40 nm CMOS process. The measurement results show that the proposed Doherty PA achieves a small-signal gain of 19.6 dB, a 3-dB bandwidth from 21 to 29 GHz, a saturated output power (Ps a t) of 19.1 dBm, an output 1-dB compression point (O P1d B ) of 17.9 dBm, a peak power added efficiency (P AEp e a k ) of 22.7%, a power added efficiency at 6-dB power back-off (P AE−6d B ) of 15.1%, and an AM-PM distortion of 0.93◦ at 26 GHz. When using a 64-QAM 100 MHz OFDM modulated signal as the input, which meets the 5G NR FR2 communication protocol and has an input PAPR of 11.38 dB, the measured output EVM is −25 dB, and ACLR is −30.5 dBc. The proposed PA realizes an average output power (Pa v g) of 12.6 dBm and an average power added efficiency (P AEa v g) of 11.3%.
AB - This paper presents a high-linearity millimeter-wave (mmWave) Doherty power amplifier (PA) for 5G FR2 wireless communications. A precise mutual distortion cancellation (PMDC) method for parallel Doherty PA is proposed. The auxiliary path current amplitude is adjusted by the common-source common-gate (CSCG) dual adaptive bias circuit (DADB). Meanwhile, the main path current phase is tuned by the phase nonlinear compensation capacitor (PNCC). These two techniques are combined to enable precise distortion cancellation, thereby optimizing the Doherty PA’s AM-AM and AM-PM distortions. The chip is fabricated in a 40 nm CMOS process. The measurement results show that the proposed Doherty PA achieves a small-signal gain of 19.6 dB, a 3-dB bandwidth from 21 to 29 GHz, a saturated output power (Ps a t) of 19.1 dBm, an output 1-dB compression point (O P1d B ) of 17.9 dBm, a peak power added efficiency (P AEp e a k ) of 22.7%, a power added efficiency at 6-dB power back-off (P AE−6d B ) of 15.1%, and an AM-PM distortion of 0.93◦ at 26 GHz. When using a 64-QAM 100 MHz OFDM modulated signal as the input, which meets the 5G NR FR2 communication protocol and has an input PAPR of 11.38 dB, the measured output EVM is −25 dB, and ACLR is −30.5 dBc. The proposed PA realizes an average output power (Pa v g) of 12.6 dBm and an average power added efficiency (P AEa v g) of 11.3%.
KW - 5G FR2
KW - AM-AM distortion
KW - AM-PM distortion
KW - CMOS
KW - Doherty power amplifier
UR - https://www.scopus.com/pages/publications/105005859335
U2 - 10.1587/elex.22.20250137
DO - 10.1587/elex.22.20250137
M3 - 文章
AN - SCOPUS:105005859335
SN - 1349-2543
VL - 22
JO - IEICE Electronics Express
JF - IEICE Electronics Express
IS - 10
M1 - 20250137
ER -