摘要
A novel fractional-N frequency synthesizer which is based on delta sigma modulator (DSM) and specialized for single-chip UHF 860-to-960 MHz band radio frequency identification (RFID) reader is proposed in this paper. The fractional-N synthesizer is implemented in 0.18 μm CMOS process. The phase noise of the fractional-N synthesizer is approximately -109 and -129 dBc/Hz at 200 kHz and 1 MHz offset from 900 MHz operating frequency while drawing 9.6 mA from 1.8 V power supply. The synthesizer is evaluated by implementing it in a direct conversion RF front-end. The front-end features a noise figure of 3.5 dB and an input-referred third-order intercept point of 5 dBm.
| 源语言 | 英语 |
|---|---|
| 页(从-至) | 67-73 |
| 页数 | 7 |
| 期刊 | Analog Integrated Circuits and Signal Processing |
| 卷 | 54 |
| 期 | 1 |
| DOI | |
| 出版状态 | 已出版 - 1月 2008 |
指纹
探究 'A fractional-N frequency synthesizer for single-chip UHF RFID reader' 的科研主题。它们共同构成独一无二的指纹。引用此
- APA
- Author
- BIBTEX
- Harvard
- Standard
- RIS
- Vancouver