TY - GEN
T1 - A 1ppm/°C and ±0.066% 3σ Accuracy Bandgap Reference with Temperature-Adaptive PTAT Scaling
AU - Rui, Jiaqing
AU - Lyu, Liangjian
AU - Wan, Yuting
AU - Shan, Kexin
AU - Gu, Wenxian
AU - Shi, C. J.Richard
AU - Wu, Xing
N1 - Publisher Copyright:
© 2026 IEEE.
PY - 2026
Y1 - 2026
N2 - This paper presents a process-independent, curvature-compensated bandgap reference. By introducing a temperature-adaptive duty-cycled resistor to scale the PTAT voltage, the design effectively compensates for CTAT nonlinearity without introducing offset errors. Fabricated in 0.18μm CMOS, the prototype chip occupies 0.068mm2 and consumes 15μA. After two-point trimming, it achieves an average temperature coefficient of 1ppm/°C and a 3σ output accuracy within ±0.066%.
AB - This paper presents a process-independent, curvature-compensated bandgap reference. By introducing a temperature-adaptive duty-cycled resistor to scale the PTAT voltage, the design effectively compensates for CTAT nonlinearity without introducing offset errors. Fabricated in 0.18μm CMOS, the prototype chip occupies 0.068mm2 and consumes 15μA. After two-point trimming, it achieves an average temperature coefficient of 1ppm/°C and a 3σ output accuracy within ±0.066%.
UR - https://www.scopus.com/pages/publications/105035322379
U2 - 10.1109/ISSCC49663.2026.11409143
DO - 10.1109/ISSCC49663.2026.11409143
M3 - 会议稿件
AN - SCOPUS:105035322379
T3 - Digest of Technical Papers - IEEE International Solid-State Circuits Conference
SP - 84
EP - 86
BT - 2026 IEEE International Solid-State Circuits Conference, ISSCC 2026
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2026 IEEE International Solid-State Circuits Conference, ISSCC 2026
Y2 - 15 February 2026 through 19 February 2026
ER -