6.25–10 Gb/s adaptive CTLE with spectrum balancing and loop-unrolled half-rate DFE in TSMC 0.18 µm CMOS

This paper presents a wide rate range receiver including adaptive continuous time linear equalizer (CTLE) and loop-unrolled half rate decision feedback equalizer (DFE). A hybrid filter is adopted to expand the rate range of adaptive CTLE with spectrum balancing technology. The current-integrating summer is introduced to reduce the power of half-rate loop-unrolled DFE. The post-simulation is carried out by 0.18 µm CMOS TSMC technology and the results show that the rate range of adaptive CTLE can reach to 6.25–10 Gb/s. When the 10 Gb/s PRBS7 signal is transmitted through the 18-inch FR4 backplane with 15.451 dB loss at Nyquist frequency, the eye diagram is obviously open and its horizontal opening is about 0.9 UI.