Venus: A Low-Latency, Low-Loss 3-D Hybrid Network-on-Chip for Kilocore Systems

Wei Tan, Huaxi Gu, Yintang Yang, Kun Wang, Xiaolu Wang

Research output: Contribution to journalArticlepeer-review

25 Scopus citations

Abstract

Network on chip (NoC) with more than 1000 cores is anticipated to meet the requirements of exascale computing in the foreseeable future. As latency is one of the most critical metrics to evaluate performance for kilocore-chip, researchers recently proposed optical networks on chip (ONoCs) with multiwavelength to achieve low latency. Nevertheless, with networks scaling to kilocores and too many wavelengths used, waveguide crossings loss and microring resonators (MRs) pass-by loss on the critical path are increased considerably. In this paper, we propose Venus, a three-dimensional NoC architecture with multiple photonic and electrical layers. By using space division multiplexing and hybrid wavelength assignments method, Venus possesses the following two features: 1) Each core can communicate with any other one in one hop and any two clusters in different subnets can communicate with each other without any blocking, thus reducing latency greatly; and 2) the number of waveguide crossings and also the MRs passed by on the critical path is reduced, thus saving energy consumption considerably. Architectures based on 64-core, 512-core, and 1024-core are simulated respectively. Evaluation results of different synthetic traffic patterns and real applications demonstrate that Venus significantly reduces the end-to-end latency and worst case loss compared to previous proposals.

Original languageEnglish
Article number8089329
Pages (from-to)5448-5455
Number of pages8
JournalJournal of Lightwave Technology
Volume35
Issue number24
DOIs
StatePublished - 15 Dec 2017
Externally publishedYes

Keywords

  • 3-D architecture
  • ONoC
  • WDM
  • hybrid photonic-electronic
  • insertion loss

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