TY - GEN
T1 - Towards Understanding Cryogenic Reliability in FinFETs Under Hot Carrier Stress
T2 - 2025 Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2025
AU - Dong, Zuoyuan
AU - Wang, Zirui
AU - Wang, Hongbo
AU - Li, Xiaomei
AU - Luo, Chen
AU - Huang, Jialu
AU - Li, Lan
AU - Huang, Zepeng
AU - Sun, Zixuan
AU - Liu, Yue Yang
AU - Wu, Xing
AU - Wang, Runsheng
N1 - Publisher Copyright:
© 2025 JSAP.
PY - 2025
Y1 - 2025
N2 - In this paper, we present a systematic study of cryogenic reliability in FinFETs under hot carrier stress down to 10K. Our findings reveal that the traditional view of hot carrier degradation (HCD)-induced Vth shift is no longer sufficient to explain device behavior at such low temperatures. For the first time, an additional ΔVth under HCD stress has been identified in PMOS, attributed to Ge migration from SiGe S/D into the Si channel. This migration reduces band tail states, as uncovered through advanced physical characterizations (TEM/EDS/EELS) and ab initio calculations. These results provide strong physical evidence linking Ge migration to Va. shift at cryogenic temperatures, highlighting the need for cryogenic reliability models to incorporate atomic-scale Ge migration effects.
AB - In this paper, we present a systematic study of cryogenic reliability in FinFETs under hot carrier stress down to 10K. Our findings reveal that the traditional view of hot carrier degradation (HCD)-induced Vth shift is no longer sufficient to explain device behavior at such low temperatures. For the first time, an additional ΔVth under HCD stress has been identified in PMOS, attributed to Ge migration from SiGe S/D into the Si channel. This migration reduces band tail states, as uncovered through advanced physical characterizations (TEM/EDS/EELS) and ab initio calculations. These results provide strong physical evidence linking Ge migration to Va. shift at cryogenic temperatures, highlighting the need for cryogenic reliability models to incorporate atomic-scale Ge migration effects.
UR - https://www.scopus.com/pages/publications/105012161043
U2 - 10.23919/VLSITechnologyandCir65189.2025.11074845
DO - 10.23919/VLSITechnologyandCir65189.2025.11074845
M3 - 会议稿件
AN - SCOPUS:105012161043
T3 - Digest of Technical Papers - Symposium on VLSI Technology
BT - 2025 Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2025
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 8 June 2025 through 12 June 2025
ER -