Towards SMT-Based LTL model checking of clock constraint specification language for real-time and embedded systems

Min Zhang, Yunhui Ying

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

19 Scopus citations

Abstract

The Clock Constraint Specification Language (CCSL) is a formal language companion to MARTE (shorthand for Modeling and Analysis of Real-Time and Embedded systems), a UML profile used to facilitate the design and analysis of real-time and embedded systems. CCSL is proposed to specify constraints on the occurrences of events in systems. However, the language lacks efficient verification support to formally analyze temporal properties, which are important properties to real-time and embedded systems. In this paper, we propose an SMT-based approach to model checking of the temporal properties specified in Linear Temporal Logic (LTL) for CCSL by transforming CCSL constraints and LTL formulas into SMT formulas. We implement a prototype tool for the proposed approach and use the state-of-the-art tool Z3 as its underlying SMT solver. We model two practical real-time and embedded systems, i.e., a traffic light controller and a power window system in CCSL, and model check LTL properties of them using the proposed approach. Experimental results demonstrate the effectiveness and efficiency of our approach.

Original languageEnglish
Title of host publicationLCTES 2017 - Proceedings of the 18th ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems, co-located with PLDI 2017
EditorsZili Shao, Vijay Nagarajan
PublisherAssociation for Computing Machinery
Pages61-70
Number of pages10
ISBN (Electronic)9781450350303
DOIs
StatePublished - 21 Jun 2017
Event18th ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems, LCTES 2017 - Barcelona, Spain
Duration: 21 Jun 201722 Jun 2017

Publication series

NameProceedings of the ACM SIGPLAN Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES)
VolumePart F128681

Conference

Conference18th ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems, LCTES 2017
Country/TerritorySpain
CityBarcelona
Period21/06/1722/06/17

Keywords

  • CCSL
  • LTL
  • Model checking
  • SMT
  • Z3

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