Template guided self-assembling two-dimensional array of Au@SiO 2 core-shell nanoparticles for room-temperature single electron transistors

  • Yong Yang
  • , Masayuki Nogami*
  • , Jianlin Shi
  • , Meiling Ruan
  • *Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

3 Scopus citations

Abstract

The composite nanoparticles of a gold core capped by a SiO 2 shell with well-controlled thickness have been synthesized and fabricated into two-dimensional array on silicon surface by a simple self-assembly method combined with an AFM nanolithography technique. Current-voltage measurements of the Au@SiO 2 composite nanoparticles (shell thickness of 6 nm) show a well-pronounced Coulomb staircase with a period of 300 mV at room temperature, demonstrating single electron transistor behavior. The step width of the Coulomb staircase can be tuned by controlling the thickness of SiO 2 shell. The tunable single electron tunneling properties make the 2D array of Au@SiO 2 composite nanoparticles an ideal candidate for planar single electron transistor devices.

Original languageEnglish
Pages (from-to)173-183
Number of pages11
JournalJournal of Nanoscience and Nanotechnology
Volume5
Issue number2
DOIs
StatePublished - 2005
Externally publishedYes

Keywords

  • AFM Nanolithography
  • Coulomb Staircase
  • Self-Assembly
  • Single Electron Tunneling
  • Two-Dimensional Array

Fingerprint

Dive into the research topics of 'Template guided self-assembling two-dimensional array of Au@SiO 2 core-shell nanoparticles for room-temperature single electron transistors'. Together they form a unique fingerprint.

Cite this