TaC: An Anti-Caching Key-Value Store on Heterogeneous Memory Architectures

In-memory key-value (KV) stores play a pivotal role in modern applications due to their exceptional performance. However, they grapple with the high cost and limited capacity of DRAM. Anti-caching systems address these limitations by using the disk (or SSD) to store cold data evicted from memory. However, as data volumes surge, the performance of anti-caching systems can degrade significantly. Luckily, the emerging byte-addressable storage, such as Non-Volatile Memory (NVM), offers larger capacity and enhanced cost-effectiveness compared to DRAM. This paper delves into its potential in building anti-caching KV stores for large-scale data. Due to the performance degradation of NVM compared to DRAM and its specific performance characteristics, how to efficiently integrate it into an anti-caching KV store poses challenges. In this paper, we discuss several potential designs and propose a three-tier anti-caching design, TaC. TaC utilizes NVM to expand the memory capacity of anti-caching systems and employs DRAM, NVM, and SSD to host hot, warm, and cold data, respectively. In particular, the three-tier architecture introduces additional challenges in data swapping and access tracking. To address them, we introduce a lightweight access tracking mechanism and a hybrid data swapping strategy. We implemented a prototype of TaC on top of the widely-used open-source in-memory KV store Memcached and evaluated it using the YCSB benchmark. The results demonstrate that TaC can outperform alternative designs across various workloads.