@inproceedings{3bb6cf9648464f62baeb298051a1ad22,
title = "Schedulability analysis with CCSL specifications",
abstract = "The Clock Constraint Specification Language (CCSL) is a formal polychronous language based on the notion of logical clock. It defines a set of kernel constraints that can represent both asynchronous and synchronous relations. It was originally developed as part of the UML Profile for MARTE to express causal and temporal constraints of Realtime and Embedded Systems. In this paper, we explore the use of ccsl for modeling scheduling requirements and to conduct schedulability analysis. For this purpose, a dedicated scheduling library of ccsl has been built This library is endowed with a state-based operational semantics, and is applied to solve issues related to schedulability analysis and latency-insensitive design. We establish schedulability categories and latency-insensitiveness property in the context of the semantics, and solve those issues by using model checking techniques.",
keywords = "CCSL, Model checking, Schedulability analysis",
author = "Ling Yin and Jing Liu and Zuohua Ding and Fr{\'e}d{\'e}ric Mallet and \{De Simone\}, Robert",
note = "Publisher Copyright: {\textcopyright} 2013 IEEE.; 20th Asia-Pacific Software Engineering Conference, APSEC 2013 ; Conference date: 02-12-2013 Through 05-12-2013",
year = "2013",
doi = "10.1109/APSEC.2013.62",
language = "英语",
isbn = "9780769549224",
series = "Proceedings - Asia-Pacific Software Engineering Conference, APSEC",
publisher = "IEEE Computer Society",
pages = "414--421",
editor = "Pornsiri Muenchaisri and Gregg Rothermel",
booktitle = "APSEC 2013 - Proceedings of the 20th Asia-Pacific Software Engineering Conference",
address = "美国",
}