QMin: Quantum Circuit Minimization via Gate Fusions for Efficient State Vector Simulation

State vector simulation is useful for designing and analyzing quantum algorithms. The challenge is that the size of the state vector increases exponentially with the number of quantum bits (qubits) and the entire state vector should be updated when simulating each quantum gate. Gate fusion, a circuit minimization technique, helps reduce simulation time by combining multiple quantum gates into one. However, the gate matrix will be large if the fused gate acts on too many qubits, which may increase the simulation costs. Previous work limits the size of fused gates based on the number of input qubits, but the impact of qubits’ types is neglected. This paper proposes a novel two-stage gate fusion strategy, namely QMin, based on the observation that control input qubits can reduce the simulation cost of a gate, which has not been discussed before. Specifically, QMin designs a pattern-controlled logic gate structure to fuse target gates apart from their control qubits. For the first target-oriented fusion stage, QMin defines beneficial mergeable gate types based on the required multiplication operations. The second tensor-oriented fusion stage merges gates under a constraint on the gate size to further reduce the number of gates. Experimental results on various circuits show that QMin can achieve more than 2.03 times speedup on average in total execution time compared with previous methods.