Abstract
The recent emergence of various Non-Volatile Memories (NVMs), with many attractive characteristics such as low leakage power and high-density, provides us with a new way of addressing the memory power consumption problem. In this paper, we target embedded CMPs, and propose a novel Hybrid Scratch Pad Memory (HSPM) architecture which consists of SRAM and NVM to take advantage of the ultra-low leakage power, high density of NVM and fast read of SRAM. A novel data allocation algorithm as well as an algorithm to determine NVM/SRAM ratio for the novel HSPM architecture are proposed. The experimental results show that the data allocation algorithm can reduce the memory access time by 31.22% and the dynamic energy consumption by 15.35% on average for the HSPM architecture when compared with a greedy algorithm.
| Original language | English |
|---|---|
| Title of host publication | Proceedings of the 2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2012 |
| Pages | 982-989 |
| Number of pages | 8 |
| DOIs | |
| State | Published - 2012 |
| Externally published | Yes |
| Event | 2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2012 - Shanghai, China Duration: 21 May 2012 → 25 May 2012 |
Publication series
| Name | Proceedings of the 2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2012 |
|---|
Conference
| Conference | 2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2012 |
|---|---|
| Country/Territory | China |
| City | Shanghai |
| Period | 21/05/12 → 25/05/12 |
UN SDGs
This output contributes to the following UN Sustainable Development Goals (SDGs)
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SDG 7 Affordable and Clean Energy
Keywords
- Data allocation
- MRAM
- NVM
- PCM
- SPM
- energy
- on-chip memory
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