Optimal data placement for memory architectures with scratch-pad memories

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

Scratch-Pad Memory (SPM) has been widely adopted in many embedded systems as well as digital signal processor systems. This paper proposes a polynomial time optimal data placement algorithm to minimize the memory access cost of one program region for memory architectures with multiple types of memory units including SPM in order to achieve high performance with low cost. The experimental results show our algorithms can reduce time cost of memory access by 18.19% and the energy cost by 16.97% compared with random data placement, which is better than the existing greedy algorithms.

Original languageEnglish
Title of host publicationProc. 10th IEEE Int. Conf. on Trust, Security and Privacy in Computing and Communications, TrustCom 2011, 8th IEEE Int. Conf. on Embedded Software and Systems, ICESS 2011, 6th Int. Conf. FCST 2011
Pages1045-1050
Number of pages6
DOIs
StatePublished - 2011
Externally publishedYes
Event10th IEEE Int. Conf. on Trust, Security and Privacy in Computing and Communications, TrustCom 2011, 8th IEEE Int. Conf. on Embedded Software and Systems, ICESS 2011, 6th Int. Conf. on Frontier of Computer Science and Technology, FCST 2011 - Changsha, China
Duration: 16 Nov 201118 Nov 2011

Publication series

NameProc. 10th IEEE Int. Conf. on Trust, Security and Privacy in Computing and Communications, TrustCom 2011, 8th IEEE Int. Conf. on Embedded Software and Systems, ICESS 2011, 6th Int. Conf. on FCST 2011

Conference

Conference10th IEEE Int. Conf. on Trust, Security and Privacy in Computing and Communications, TrustCom 2011, 8th IEEE Int. Conf. on Embedded Software and Systems, ICESS 2011, 6th Int. Conf. on Frontier of Computer Science and Technology, FCST 2011
Country/TerritoryChina
CityChangsha
Period16/11/1118/11/11

Keywords

  • Data placement
  • Embedded System
  • Scratch-Pad Memory

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