Novel Negative Capacitance Reconfigurable Transistor With Arch-Shaped Source

Novel negative capacitance reconfigurable field effect transistor with arch-shaped source (NC-ESRFET) is proposed in this work. The performance is evaluated by combining 3D TCAD simulation with Laudau-Khalatnikov equation. Because of the amplified vertical electric field, the negative capacitance induced by ferroelectric (FE) layer improves the vertical line tunneling around the embedded source, and an enhanced NC effect is found in proposed NC-ESRFET, no matter for N-type or P-type program. Compared to the conventional nanowire negative capacitance RFET (NC-RFET), a larger critical FE layer thickness and lower subthreshold swing (SS) are obtained in NC-ESRFE, and the lowest SS is lower than 43 mV/dec and average SS is 63 mV/dec, which declines by 33% compared with NC-RFET. Besides, the diameter of embedded source D_AS has greater influence on NC enhancement than the length L_AS. By reasonably choosing the structure parameters, a 54.4% improvement on driven current and 14.3% decline in SS is obtained in the optimized NC-ESRFET. The results here demonstrate the great attentions of NC-ESRFET in future low power application.