Nested loops optimization for multiprocessor architecture design

Andrea Leonardi, Nelson L. Passos, Edwin H.M. Sha

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Multi-dimensional systems, including image processing, geophysical signal processing, and fluid dynamics, are becoming one of the most important targets of computational improvement studies. Most of the optimized solutions to those problems point to the use of application specific integrated circuits (ASICs). From the analysis of the multi-dimensional programming code, one can observe that nested loop like structures are often the most time consuming part. Designing ASICs with multiple processing units is usually the appropriate solution to achieve the required computational performance. In this paper, a new loop transformation algorithm, which allows an efficient utilization of the multiprocessor system is presented. Uniform nested loops are modeled as multi-dimensional data flow graphs. New loop structures are generated so that an arbitrary number of processors available in the system can run in parallel. An example demonstrates the effectiveness of the algorithm.

Original languageEnglish
Title of host publicationProceedings - 1998 Midwest Symposium on Circuits and Systems, MWSCAS 1998
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages415-418
Number of pages4
ISBN (Electronic)0818689145
DOIs
StatePublished - 1998
Externally publishedYes
Event1998 Midwest Symposium on Circuits and Systems, MWSCAS 1998 - Notre Dame, United States
Duration: 9 Aug 199812 Aug 1998

Publication series

NameMidwest Symposium on Circuits and Systems
ISSN (Print)1548-3746

Conference

Conference1998 Midwest Symposium on Circuits and Systems, MWSCAS 1998
Country/TerritoryUnited States
CityNotre Dame
Period9/08/9812/08/98

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