Low-voltage polymer monolayer transistors for high-gain unipolar and complementary logic inverters

  • Miao Cheng
  • , Yanqin Zhang
  • , Lei Zheng
  • , Jianwei Zhang
  • , Yifan Xie
  • , Qingqing Jin
  • , Yue Tian
  • , Jinyao Wang
  • , Hongmei Xiao
  • , Chunmeng Dou
  • , Zhenzhong Yang
  • , Mengmeng Li*
  • , Ling Li
  • , Ming Liu
  • *Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

5 Scopus citations

Abstract

Cutting-edge integrated circuits based on organic transistors, though promising, encounter a notable obstacle due to their tendency for high power consumption, thereby constraining their broader practical applications. This study demonstrates low-voltage polymer monolayer thin-film transistors (TFTs) and high-gain logic inverters, wherein the utilization of thin films of AlOx as gate dielectrics effectively enhances the gate controllability of TFTs. A photolithography-compatible method using a sacrificial layer is proposed to pattern the polymer monolayer, which significantly reduces off-state and gate leakage currents to 10−12 A and achieves a steep subthreshold swing of 86 mV dec−1. These device performances generate a maximum intrinsic gain of 104 V/V, enabling the development of zero-VGS-load logic inverters with voltage gains up to 251 V/V at a −3 V operation voltage (VDD). Additionally, hybrid complementary inverters by integrating with amorphous indium gallium zinc oxide (IGZO) exhibit ultra-high voltage gains of 841 V/V at a VDD of 5 V and 7436 V/V at a VDD of 30 V, potentially setting a new benchmark for logic inverters across various semiconductor systems. These results open new avenues for advancements in low-voltage organic and hybrid logics tailored for portable and wearable electronics.

Original languageEnglish
Pages (from-to)9562-9570
Number of pages9
JournalJournal of Materials Chemistry C
Volume12
Issue number26
DOIs
StatePublished - 25 May 2024

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