TY - GEN
T1 - Investigation on Enhanced Hot Carrier Degradation in FinFETs at Cryogenic Temperature
AU - Wang, Zirui
AU - Dong, Zuoyuan
AU - Wang, Hongbo
AU - Sun, Zixuan
AU - Liu, Yue Yang
AU - Wu, Xing
AU - Wang, Runsheng
N1 - Publisher Copyright:
© 2025 Japan Society of Applied Physics.
PY - 2025
Y1 - 2025
N2 - In this paper, we investigate the enhanced hot carrier degradation (HCD) in FinFET at cryogenic temperatures. Under comparable stress condition, significantly enhanced Vth degradation than room temperature HCD is observed for cryogenic HCD, which can be successfully explained by three main factors: (a) Ge element migration from the drain migrates into the channel and reduce the band tail states under cryogenic HCD in pFinFET (b) Fermi levels moves closer to the band edge which increase the occupation of interface traps and amplify Δ Vth. (c) The enhancement of ballistic transport results in more high energy carrier, consequently accelerating the interface trap generation rate. This work reveals the impacts of cryogenic physics on HCD and provides insights into the cryogenic reliability analysis.
AB - In this paper, we investigate the enhanced hot carrier degradation (HCD) in FinFET at cryogenic temperatures. Under comparable stress condition, significantly enhanced Vth degradation than room temperature HCD is observed for cryogenic HCD, which can be successfully explained by three main factors: (a) Ge element migration from the drain migrates into the channel and reduce the band tail states under cryogenic HCD in pFinFET (b) Fermi levels moves closer to the band edge which increase the occupation of interface traps and amplify Δ Vth. (c) The enhancement of ballistic transport results in more high energy carrier, consequently accelerating the interface trap generation rate. This work reveals the impacts of cryogenic physics on HCD and provides insights into the cryogenic reliability analysis.
UR - https://www.scopus.com/pages/publications/105013618271
U2 - 10.23919/SNW65111.2025.11097247
DO - 10.23919/SNW65111.2025.11097247
M3 - 会议稿件
AN - SCOPUS:105013618271
T3 - 2025 Silicon Nanoelectronics Workshop, SNW 2025
SP - 118
EP - 119
BT - 2025 Silicon Nanoelectronics Workshop, SNW 2025
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2025 Silicon Nanoelectronics Workshop, SNW 2025
Y2 - 8 June 2025 through 9 June 2025
ER -