High Mobilities in Layered InSe Transistors with Indium-Encapsulation-Induced Surface Charge Doping

Mengjiao Li, Che Yi Lin, Shih Hsien Yang, Yuan Ming Chang, Jen Kuei Chang, Feng Shou Yang, Chaorong Zhong, Wen Bin Jian, Chen Hsin Lien, Ching Hwa Ho, Heng Jui Liu, Rong Huang, Wenwu Li*, Yen Fu Lin, Junhao Chu

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

140 Scopus citations

Abstract

Tunability and stability in the electrical properties of 2D semiconductors pave the way for their practical applications in logic devices. A robust layered indium selenide (InSe) field-effect transistor (FET) with superior controlled stability is demonstrated by depositing an indium (In) doping layer. The optimized InSe FETs deliver an unprecedented high electron mobility up to 3700 cm2 V−1 s−1 at room temperature, which can be retained with 60% after 1 month. Further insight into the evolution of the position of the Fermi level and the microscopic device structure with different In thicknesses demonstrates an enhanced electron-doping behavior at the In/InSe interface. Furthermore, the contact resistance is also improved through the In insertion between InSe and Au electrodes, which coincides with the analysis of the low-frequency noise. The carrier fluctuation is attributed to the dominance of the phonon scattering events, which agrees with the observation of the temperature-dependent mobility. Finally, the flexible functionalities of the logic-circuit applications, for instance, inverter and not-and (NAND)/not-or (NOR) gates, are determined with these surface-doping InSe FETs, which establish a paradigm for 2D-based materials to overcome the bottleneck in the development of electronic devices.

Original languageEnglish
Article number1803690
JournalAdvanced Materials
Volume30
Issue number44
DOIs
StatePublished - 2 Nov 2018

Keywords

  • 2D electronics
  • InSe transistors
  • logic circuits
  • low-frequency noise
  • surface charge transfer doping

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