TY - GEN
T1 - GPU Accelerated On-the-Fly Reachability Checking
AU - Wu, Zhimin
AU - Liu, Yang
AU - Sun, Jun
AU - Shi, Jianqi
AU - Qin, Shengchao
N1 - Publisher Copyright:
© 2015 IEEE.
PY - 2016/1/15
Y1 - 2016/1/15
N2 - Model checking suffers from the infamous state space explosion problem. In this paper, we propose an approach, named GPURC, to utilize the Graphics Processing Units (GPUs) to speed up the reachability verification. The key idea is to achieve a dynamic load balancing so that the many cores in GPUs are fully utilized during the state space exploration. To this end, we firstly construct a compact data encoding of the input transition systems to reduce the memory cost and fit the calculation in GPUs. To support a large number of concurrent components, we propose a multi-integer encoding with conflict-release accessing approach. We then develop a BFS-based state space generation algorithm in GPUs, which makes full use of the GPU memory hierarchy and the latest dynamic parallelism feature in CUDA to achieve a high parallelism. GPURC also supports a parallel collaborative event synchronization approach and integrates a GPU hashing method to reduce the cost of data accessing. The experiments show that GPURC can give significant performance speedup (average 50X and up to 100X) compared with the traditional sequential algorithms.
AB - Model checking suffers from the infamous state space explosion problem. In this paper, we propose an approach, named GPURC, to utilize the Graphics Processing Units (GPUs) to speed up the reachability verification. The key idea is to achieve a dynamic load balancing so that the many cores in GPUs are fully utilized during the state space exploration. To this end, we firstly construct a compact data encoding of the input transition systems to reduce the memory cost and fit the calculation in GPUs. To support a large number of concurrent components, we propose a multi-integer encoding with conflict-release accessing approach. We then develop a BFS-based state space generation algorithm in GPUs, which makes full use of the GPU memory hierarchy and the latest dynamic parallelism feature in CUDA to achieve a high parallelism. GPURC also supports a parallel collaborative event synchronization approach and integrates a GPU hashing method to reduce the cost of data accessing. The experiments show that GPURC can give significant performance speedup (average 50X and up to 100X) compared with the traditional sequential algorithms.
UR - https://www.scopus.com/pages/publications/84964820984
U2 - 10.1109/ICECCS.2015.21
DO - 10.1109/ICECCS.2015.21
M3 - 会议稿件
AN - SCOPUS:84964820984
T3 - Proceedings of the IEEE International Conference on Engineering of Complex Computer Systems, ICECCS
SP - 100
EP - 109
BT - Proceedings - 2015 20th International Conference on Engineering of Complex Computer Systems, ICECCS 2015
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 20th International Conference on Engineering of Complex Computer Systems, ICECCS 2015
Y2 - 9 December 2015 through 11 December 2015
ER -