Abstract
This article introduces the generalized rapid thin-film-transistor (TFT) modeling (GRTM) framework, an innovative approach using deep learning (DL) techniques for efficient and accurate modeling and generation of Verilog-A code of TFT devices. Traditional TFT modeling methods, such as physics-based and lookup table (LUT)-based models, often involve complex, manual parameter tuning and struggle with generalizability across different device types. The GRTM framework streamlines the modeling process by leveraging DL algorithms to automatically learn from input datasets, significantly reducing human effort in parameter extraction and fitting. Thus, a new aspect of GRTM is its compatibility with commercial SPICE simulators, achieved by converting DL models into Verilog-A SPICE code. The framework's efficacy is demonstrated through its application to low-temperature polysilicon (LTPS) TFT devices, showing a fourfold increase in accuracy and a substantial reduction in model development time compared with conventional physics-based models. The performance and features of the GRTM framework are compared with existing methods, highlighting its potential to revolutionize TFT device modeling.
| Original language | English |
|---|---|
| Pages (from-to) | 190-196 |
| Number of pages | 7 |
| Journal | IEEE Journal on Flexible Electronics |
| Volume | 3 |
| Issue number | 5 |
| DOIs | |
| State | Published - 2024 |
| Externally published | Yes |
Keywords
- Circuit design
- current-voltage (I-V) surrogate model
- deep learning (DL)
- design technology co-optimization (DTCO)
- device modeling
- field-effect transistors (FETs)
- low-temperature polysilicon (LTPS)
- thin-film transistors (TFTs)
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