TY - GEN
T1 - FoToNoC
T2 - 21st Asia and South Pacific Design Automation Conference, ASP-DAC 2016
AU - Yang, Lei
AU - Liu, Weichen
AU - Jiang, Weiwen
AU - Li, Mengquan
AU - Yi, Juan
AU - Sha, Edwin Hsing Mean
N1 - Publisher Copyright:
© 2016 IEEE.
PY - 2016/3/7
Y1 - 2016/3/7
N2 - In this dark silicon era, techniques have been developed to selectively activate nonadjacent cores in physical locations to maintain the safe temperature and allowable power budget on a many-core chip. This will result in unexpected increase in the communication overhead due to longer average distance between active cores in a typical mesh-based Network-on-Chip (NoC), and in turn reduce the system performance and energy efficiency. In this paper, we present FoToNoC, a Folded Torus-like NoC, and a hierarchical management strategy on top of it, to address this tradeoff problem for heterogeneous many-core systems. Optimizations of chip temperature, inter-core communication, application performance, and system energy consumption are well isolated in FoToNoC, and addressed in different design phases and aspects. A cluster-based hierarchical strategy is proposed to manage the system adaptively in several different control levels. Compared with mesh-based systems on a set of synthetic and real benchmarks, FoToNoC can achieve on average 39.4% performance improvement when similar temperature conditions are maintained, and the proposed strategy can further reduce the total energy consumption by up to 42.0%.
AB - In this dark silicon era, techniques have been developed to selectively activate nonadjacent cores in physical locations to maintain the safe temperature and allowable power budget on a many-core chip. This will result in unexpected increase in the communication overhead due to longer average distance between active cores in a typical mesh-based Network-on-Chip (NoC), and in turn reduce the system performance and energy efficiency. In this paper, we present FoToNoC, a Folded Torus-like NoC, and a hierarchical management strategy on top of it, to address this tradeoff problem for heterogeneous many-core systems. Optimizations of chip temperature, inter-core communication, application performance, and system energy consumption are well isolated in FoToNoC, and addressed in different design phases and aspects. A cluster-based hierarchical strategy is proposed to manage the system adaptively in several different control levels. Compared with mesh-based systems on a set of synthetic and real benchmarks, FoToNoC can achieve on average 39.4% performance improvement when similar temperature conditions are maintained, and the proposed strategy can further reduce the total energy consumption by up to 42.0%.
UR - https://www.scopus.com/pages/publications/84997047700
U2 - 10.1109/ASPDAC.2016.7428097
DO - 10.1109/ASPDAC.2016.7428097
M3 - 会议稿件
AN - SCOPUS:84997047700
T3 - Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
SP - 725
EP - 730
BT - 2016 21st Asia and South Pacific Design Automation Conference, ASP-DAC 2016
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 25 January 2016 through 28 January 2016
ER -