FEEP: Functional ECO Synthesis with Efficient Patch Minimization

  • Yaotian Liu
  • , Yuhang Zhang*
  • , Qing Zhang
  • , Rui Chen
  • , Yongfu Li
  • *Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

Functional engineering change order (ECO) has been an essential process in modern complex integrated circuit design. Finding a high-quality circuit patch efficiently has long been a challenge. This paper proposes FEEP, an automatic and efficient synthesis-based functional ECO method. Structural pruning and stratified searching techniques are proposed to minimize search space without extra logical equivalence checks. Moreover, we propose a machine-learning-based two-stage patch size predictor that assists in predicting patch quality. Experimental results show that our algorithm can efficiently search and produce high-quality patches under various test cases.

Original languageEnglish
Title of host publicationAICAS 2023 - IEEE International Conference on Artificial Intelligence Circuits and Systems, Proceeding
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9798350332674
DOIs
StatePublished - 2023
Externally publishedYes
Event5th IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2023 - Hangzhou, China
Duration: 11 Jun 202313 Jun 2023

Publication series

NameAICAS 2023 - IEEE International Conference on Artificial Intelligence Circuits and Systems, Proceeding

Conference

Conference5th IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2023
Country/TerritoryChina
CityHangzhou
Period11/06/2313/06/23

Keywords

  • Engineering change order (ECO)
  • circuit patch
  • electronics design automation (EDA)
  • equivalence checking (EC)
  • machine learning (ML)

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