Explicit construction for reliable reconfigurable array architectures

E. H.M. Sha, K. Steiglitz

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

5 Scopus citations

Abstract

This paper describes some explicit constructions for reconfigurable array architectures. Given a working architecture (application graph), the authors add redundant hardware to increase reliability. The degree of reconfigurability, DR, of a redundant graph is a measure of the cost of reconfiguration after failures. When DR is independent of the size of the application graph, the authors say the graph is finitely reconfigurable, FR. They present a class of simple layered graphs with a logarithmic number of redundant edges, which can maintain both finite reconfigurability and a fixed level of reliability for a wide class of application graphs. By sacrificing finite reconfigurability, they show that by using expanders they can construct highly reliable structures with the asymptotically optimal number of edges for one-dimensional and tree-like array architectures.

Original languageEnglish
Title of host publicationProceedings of the 3rd IEEE Symposium on Parallel and Distributed Processing 1991
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages640-647
Number of pages8
ISBN (Electronic)0818623101, 9780818623103
DOIs
StatePublished - 1991
Externally publishedYes
Event3rd IEEE Symposium on Parallel and Distributed Processing, PDPS 1991 - Dallas, United States
Duration: 2 Dec 19915 Dec 1991

Publication series

NameProceedings of the 3rd IEEE Symposium on Parallel and Distributed Processing 1991

Conference

Conference3rd IEEE Symposium on Parallel and Distributed Processing, PDPS 1991
Country/TerritoryUnited States
CityDallas
Period2/12/915/12/91

Fingerprint

Dive into the research topics of 'Explicit construction for reliable reconfigurable array architectures'. Together they form a unique fingerprint.

Cite this