Electronic Assessment of Novel Arch-Shaped Asymmetrical Reconfigurable Field-Effect Transistor

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Abstract

In this article, a novel arch-shaped asymmetrical reconfigurable field-effect transistor (RFET) has been proposed for the first time. By adding an arch-shaped source region in a silicon nanowire, the ON-state saturated current ( ION) is found to raise about 6.72 times for the n-type and 5.39× for the p-type, compared with conventional RFET. The tunneling and conduction mechanism is investigated in detail by 3-D technology computer aided design (TCAD) simulations. It is demonstrated that the geometry parameters of the arch-shaped source in our proposed asymmetrical RFET have a significant impact on the tunneling area, tunneling strength, and serial resistance. Moreover, the arch-shaped source is able to reduce the gate capacitance ( Cgg ) as well. The increased ION and the decreased Cgg lower the propagation delay decreased by 51.9% in basic combination logic applications.

Original languageEnglish
Article number9018250
Pages (from-to)1894-1901
Number of pages8
JournalIEEE Transactions on Electron Devices
Volume67
Issue number4
DOIs
StatePublished - 1 Apr 2020

Keywords

  • Arch-shaped source
  • Schottky barriers
  • band-to-band tunneling (BTBT)
  • reconfigurable field-effect transistor (RFET)
  • silicon nanowires (SiNW)

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